A passive optical network (PON) is a point-to-multipoint network architecture that enables a single optical fiber to serve multiple premises using passive, unpowered optical splitters. The GPON (gigabit passive optical network) standard differs from other PON standards in that it achieves higher bandwidth and higher efficiency using larger, variable-length packets of data.
A GPON network includes a central office node referred to as an optical line terminal (OLT), user nodes referred to as optical network units (ONUs), and optical fibers and optical splitters coupled between the OLT and the ONUs. In a GPON network, the transmission modes for downstream (i.e., from OLT to ONU) and upstream (i.e., from ONU to OLT) are different. For the downstream transmission, the OLT broadcasts data signals to the ONUs in continuous mode in which the downstream channel has continuous data signals. However, in the upstream channel, ONUs do not transmit data signals in continuous mode. Using continuous mode in the upstream channel would cause all of the data signals transmitted from the ONUs to converge into one fiber and overlap.
To solve this problem, burst mode transmission is used for the upstream channel in GPON networks. In burst mode transmission, an ONU only transmits data when it is allocated a time slot, and all of the ONUs share the upstream channel using time division multiplexing (TDM). Because data signals are transmitted to the OLT without an accompanying clock signal, a clock and data recovery (CDR) circuit in a receiver at the OLT generates a clock signal from an approximate frequency reference signal and then phase-aligns the clock signal to the transitions in the input data signal. The clock signal is then used to sample data in the input data signal.
The Stratix® IV GX field programmable gate array (FPGA) manufactured by Altera Corporation of San Jose, Calif., includes a clock data recovery (CDR) circuit that functions in two modes. The two modes are lock-to-data mode and lock-to-reference mode. In lock-to-data mode, the CDR circuit adjusts the phases of its output clock signals based on the phase of the input data signal. In lock-to-reference mode, the CDR circuit adjusts the phases and frequencies of its output clock signals based on the phase and the frequency of a reference clock signal.
In burst mode transmission, the input data signal does not contain data during dead times. When the input data signal contains data, the CDR circuit functions in lock-to-data mode. The CDR circuit remains in lock-to-data mode during the dead time if the dead time is short (i.e., less than 125 nanoseconds), but the frequencies of the output clock signals generated by the CDR circuit do not change enough to impact performance.
If the dead time is long (i.e., greater than 250 nanoseconds), the CDR circuit switches from lock-to-data mode to lock-to-reference mode during the dead time. In the lock-to-reference mode, the CDR circuit has enough time to align the phase and frequency of a feedback clock signal with the phase and frequency of the reference clock signal. When the input data signal contains data after the dead time, the CDR circuit switches back to lock-to-data mode.
If the dead time has an intermediate duration (i.e., between 125 and 250 nanoseconds), the CDR circuit either does not switch to lock-to-reference mode or does not switch to lock-to-reference mode for long enough to allow the CDR circuit to align the phase and frequency of the feedback clock signal with the phase and frequency of the reference clock signal. During a dead time having an intermediate duration, the phases and frequencies of the output clock signals of the CDR circuit drift away from desired values.
FIG. 1 is a timing diagram that illustrates simplified examples of waveforms of input data signals D1, D2, and D3 with dead times that have short, intermediate, and long durations, respectively. The input data signals D1, D2, and D3 are transmitted to a CDR circuit in burst mode transmission such that periods of data in each of the data signals are separated by dead times. The data signals D1, D2, and D3 do not contain data during the dead times.